Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1999-05-07
2000-05-09
Dang, Trung
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438197, 438595, H01L 213205
Patent
active
060603771
ABSTRACT:
A polysilicon structure is fabricated with a reduced length that is beyond that achievable from photolithography by using a silicidation anneal to control the reduced length. Generally, the present invention includes a step of forming a masking polysilicon structure having a first predetermined length defined by sidewalls on ends of the first predetermined length of the masking polysilicon structure. The present invention also includes a step of depositing a layer of metal on the sidewalls of the masking polysilicon structure. The layer of metal has a predetermined thickness. The layer of metal reacts with the masking polysilicon structure at the sidewalls of the masking polysilicon structure in a silicidation anneal to form metal silicide. The masking polysilicon structure has a second predetermined length that is reduced from the first predetermined length when the metal silicide has consumed into the sidewalls of the masking polysilicon structure after the silicidation anneal. The second predetermined length depends on the predetermined thickness of the layer of metal deposited on the sidewalls of the masking polysilicon structure. The masking polysilicon structure has the second predetermined length and is used as a mask for etching a first layer of polysilicon to form the polysilicon structure from the first layer of polysilicon. The remaining polysilicon structure after this etch has the reduced length that is substantially equal to the second predetermined length of the masking polysilicon structure. The present invention may be used to particular advantage when the polysilicon structure having the reduced length forms a gate electrode of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
REFERENCES:
patent: 5837588 (1998-11-01), Wu
patent: 5866473 (1999-02-01), Xiang et al.
patent: 5937319 (1999-08-01), Xiang et al.
Bell Scott A.
Xiang Qi
Yang Chih-Yuh
Advanced Micro Devices , Inc.
Choi Monica H.
Dang Trung
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