Dynamic type semiconductor memory device

Static information storage and retrieval – Systems using particular element – Capacitors

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365207, 365208, G11C 1124

Patent

active

052205274

ABSTRACT:
According to this invention, there is disclosed a dynamic type semiconductor memory device including a plurality of memory cells, plural pairs of bit lines, a first sense amplifier, arranged for each of the plural pairs of bit lines, for amplifying a bit line signal, a pair of data input/output lines for extracting data from the pair of bit lines, a second sense amplifier arranged for each of the plural pairs of bit lines and consisting of first and second driver MOS transistors the gates of which are connected to the first and second bit lines, the second sense amplifier being activated simultaneously when or immediately after the first sense amplifier is activated in a data reading operation, first and second column selecting transistors which are inserted between the pair of data input/output lines and the second sense amplifier and gates of which are connected to a column selecting line, and first and second write transistors each having one current path connected to a corresponding one of the pair of bit lines and the other current path connected to one or the other output terminal, the first and second write transistors being turned on in a data writing operation.

REFERENCES:
patent: 4748596 (1988-05-01), Ogura et al.
patent: 4777625 (1988-10-01), Sakui et al.
patent: 4780850 (1988-10-01), Miyamoto et al.
patent: 4829483 (1989-05-01), Ogihara
patent: 4984206 (1991-01-01), Komatsu et al.
ISSCC, Fumio Baba et al., Feb. 23, 1983, pp. 64-65.

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