Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-03-29
1998-09-15
Shin, Christopher B.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395872, 395892, 395878, 395888, 395885, 395250, 395880, 711100, G06F 1300
Patent
active
058093370
ABSTRACT:
A mass storage device having a storage medium on which digital signals can be stored. The mass storage device is coupleable to a computer through a high-speed serial bus. The high-speed serial bus has a latency and a signal transmission rate sufficient to enable transmission of digital signals between the mass storage device and the computer without interim storage of the digital signals in a buffer inside the mass storage device. The computer has a processor capable of processing the digital signals and the digital signals may be transmitted between the mass storage device and the computer without processing of the digital signals by a processor in the mass storage device.
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IEEE Draft Standard for a High Performance Serial Bus, P1394, D8.0v2, Jul. 1995, DS3285. Institute of Electrical and Electronics Engineers, Inc.
Coulson Richard L.
Hannah Eric C.
Hauck Jerrold V.
Intel Corporation
Shin Christopher B.
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