Non-volatile RAM with integrated compact static RAM load configu

Static information storage and retrieval – Systems using particular element – Flip-flop

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365189, 365226, 365228, G11C 1400, G11C 1141

Patent

active

050653628

ABSTRACT:
A non-volatile random access memory (NVRAM) cell of condensed size employs a pair of programmable threshold voltage devices, e.g. MNOS (metal nitride oxide semiconductor), SNOS (silicon nitride oxide semiconductor), SONOS (silicon oxide-nitride-oxide semiconductor) or floating gate transistors, in which different threshold voltage levels are established in accordance with the data signal levels existing on the data nodes of a flip flop, when the volatile data is stored in the programmable devices. During recall of the non-volatile stored data to the data nodes of the flip flop, the programmable devices actively conduct current to the data nodes to set the flip flop in the same state that existed when the data was stored. Power is supplied to the flip flop independently of the power supplied to the programmable devices. A single polysilicon conductor forms gates of transistors which connect the programmable devices to the data nodes and the gates of the flip flop transistors. A load device for each data node is integrated in the single polysilicon conductor. A dynamic program inhibit capability is achieved in each programmable device during the store operation, by applying a series of programming signal pulses.

REFERENCES:
patent: 3636530 (1972-01-01), Mark et al.
patent: 3950737 (1976-04-01), Uchida et al.
patent: 4044343 (1977-08-01), Uchida
patent: 4090259 (1978-05-01), Wilcock et al.
patent: 4143286 (1979-03-01), Koike
patent: 4270188 (1981-05-01), Saito
patent: 4271487 (1981-06-01), Craycraft et al.
patent: 4370798 (1983-02-01), Lien et al.
patent: 4403306 (1983-09-01), Tokushige et al.
patent: 4541006 (1985-09-01), Ariizumi et al.
patent: 4541073 (1985-09-01), Brice et al.
patent: 4560419 (1985-12-01), Bourassa et al.
patent: 4675715 (1987-06-01), Lepselter et al.
patent: 4679170 (1987-07-01), Bourassa et al.
patent: 4774203 (1988-09-01), Ikeda et al.
patent: 4870615 (1989-09-01), Maroyama et al.
patent: 36767117 (1972-07-01), Lockwood
SNOS 1K.times.8 Static Nonvolatile RAM, IEEE Journal of Solid-State Circuits, vol. SC-17, #5.
The Metal-Nitride-Oxide-Silicon (MNOS) Transistor-Characteristics and Applications, Proceedings of the IEEE, vol. 58, #8.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Non-volatile RAM with integrated compact static RAM load configu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-volatile RAM with integrated compact static RAM load configu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile RAM with integrated compact static RAM load configu will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1017663

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.