Spiral scrambling

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

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Details

714718, 714752, G06F 702

Patent

active

061675539

ABSTRACT:
A system and a method for transforming an N-bit input value into a transformed N-bit output value which may be used for error correction coding or ciphering of the N-bit input value. In a representative embodiment, the system comprises means for providing a set of all possible N-bit values as a plurality of mutually exclusive subsets each containing at least one possible N-bit value; means for comparing the N-bit input value with each of the subsets to determine to which one of the subsets the N-bit input value belongs; and means for selecting as the transformed N-bit output value an N-bit value from another one of the subsets. In accordance with the present invention, each of these subsets may be cyclically generated in a linear feedback shift register (LFSR) or, alternatively, stored in a memory.

REFERENCES:
patent: 4839841 (1989-06-01), Hagen et al.
patent: 5533039 (1996-07-01), Boyer

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