MOS type semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257335, 257412, 257607, H01L 2968, H01L 29167

Patent

active

052508323

ABSTRACT:
A MOS type semiconductor memory device comprises a silicon (Si) substrate of a first conductivity type and a memory cell on a main surface of the Si substrate including a MOS transistor with a first and a second diffused layer highly doped with opposite second conductivity type impurities which provide a source and a drain region spaced apart in the main surface, a gate electrode of a conductive material formed through an insulating layer between the two highly doped diffused layers; an inter-layer insulating film formed to cover the MOS transistor; a capacitor cell formed on the inter-layer film including a lower electrode layer of conductive material formed on the inter-layer insulating film, a portion of which extends through a contact hole formed in the inter-layer insulating layer to penetrate through this layer to reach the junction adjacent to one of the highly doped diffused layers, a dielectric film on the lower electrode layer, and an upper electrode layer formed on the insulating film; and a double-diffused layer doped with the second conductivity type impurities formed to overlap with one of the two highly doped diffused layers at the junction of the Si substrate to make an electric contact between the source-drain circuit of the MOS transistor and the lower electrode.

REFERENCES:
patent: 5017982 (1991-05-01), Kobayashi
patent: 5027185 (1991-06-01), Liauh

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