Structure of semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257306, 257308, 257310, 257379, H01L 2710

Patent

active

052508285

ABSTRACT:
A semiconductor memory device has a stacked capacitor cell structure which is composed of two MIS transistors and one capacitor. One MIS transistor is formed between a charge accumulation electrode (storage node), and a substrate and an opposite conductive type diffusion layer region. This arrangement can reduce the charge flowing out of and into the substrate and the opposite conductive type diffusion layer region, thus improving the charge holding time.

REFERENCES:
patent: 5057888 (1991-10-01), Fazan et al.
patent: 5072276 (1991-12-01), Malhi et al.

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