4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Transmission facility testing

William W. Kidd

Attorney

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Battery-optimized system-on-a-chip and applications thereof

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Efficient header acquisition

Pulse or digital communications – Receivers – Particular pulse demodulator or detector
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Error detection scheme for a high-speed data channel

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2100954

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