4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Takaki Yoshida

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Error portion detecting method and layout method for...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Fault detecting method and layout method for semiconductor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Fault detecting method and layout method for semiconductor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Indication instrument

Signals and indicators – Indicators – Rotary indicator with actuating means
Reexamination Certificate

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Methods for designing and testing semiconductor integrated...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2980070

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