4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

Seok-mann Ju

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Optimizing I/O performance in a RAID subsystem using an...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Test method of cache memory of multiprocessor system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Utility Patent

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Profile ID: LFUS-PAI-P-2107388

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