4. Static information storage and retrieval
  5. Addressing

Satoru Masaki

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Circuit for reading out address data applied to a memory in a on

Static information storage and retrieval – Addressing
Patent

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Integrated circuit device having high abnormal voltage detection

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent

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Level converter for CMOS 3V to from 5V

Electronic digital logic circuitry – Interface – Supply voltage level shifting
Patent

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Profile ID: LFUS-PAI-P-97422

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