4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital data error correction

Satish Padmanabhan

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Apparatus and method for computing the result of a viterbi equat

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Circuit and method for multiplying and accumulating the sum...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1403154

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