4. Miscellaneous active electrical nonlinear devices, circuits, and
  5. Specific identifiable device, circuit, or system
  6. Fusible link or intentional destruct circuit

Peter Verwegen

Inventor

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Edge-triggered master + LSSD slave binary latch

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Zero volt/zero current fuse arrangement

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit
Patent

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Profile ID: LFUS-PAI-P-1827524

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