4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Hierarchical memories

Paul S. Neuman

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Method and apparatus for prioritized transaction queuing

Electrical computers and digital data processing systems: input/ – Access arbitrating – Access prioritizing
Reexamination Certificate

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Method and apparatus for variable delay data transfer

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate

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Method for improved first level cache coherency

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Profile ID: LFUS-PAI-P-3001139

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