4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital data error correction

Michael Kennard Tayler

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Chip correct and fault isolation in computer memory systems

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Edge detector and method

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By pulse coincidence
Reexamination Certificate

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Hierarchical memory correction system and method

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Integrated circuit with a scalable high-bandwidth architecture

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Integrated circuit with a scalable high-bandwidth architecture

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2194772

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