4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Margaret Martonosi

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Configurable hardware system implementing Boolean...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Implementation of boolean satisfiability with non-chronological

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for edge-endpoint-based VLSI design...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Method and apparatus for reducing leakage power in a cache...

Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate

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Method and apparatus for SAT solver architecture with very...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-335430

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