4. Excavating

Jy-Der Tai

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Architecture for memory multiplexing

Excavating
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Circuitry and method for modularized single transition counting

Electrical pulse counters – pulse dividers – or shift registers: c – Applications – Including memory
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Circuitry and method for variable single transition counting

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Comparing counts
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Data access controller and method

Static information storage and retrieval – Read/write circuit – Serial read/write
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Fast real-time arbiter

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Profile ID: LFUS-PAI-P-107297

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