4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital data error correction

Joong-Bae Kim

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Apparatus for redundant interconnection between multiple...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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VRAM-based parity engine for use in disk array controller

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Profile ID: LFUS-PAI-P-869749

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