4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Jong-taek Kwak

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Merged memory and logic (MML) integrated circuits including buil

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Merged memory-logic semiconductor device having a built-in...

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Method and apparatus for drawing graphics in a graphics controll

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Patent

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Profile ID: LFUS-PAI-P-1139580

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