4. Electrical computers and digital processing systems: support
  5. Clock, pulse, or timing signal generation or analysis

John D. Wallner

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ATM switch with rate-limiting congestion control

Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network
Reexamination Certificate

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Controlling timing dependencies in a mixed signal...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate

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Flow integrity for path transitioning data switch

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
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Input buffering and queue status-based output control for a...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Input buffering and queue status-based output control for a...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
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Profile ID: LFUS-PAI-P-2159222

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