4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Jinglun Tam

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Boundary scan system with address dependent instructions

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Integrated logic circuit with functionally flexible input/output

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
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Profile ID: LFUS-PAI-P-913241

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