4. Computer-aided design and analysis of circuits and semiconductor
  5. Nanotechnology related integrated circuit design

Jean-Marie Brunet

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Gate modeling for semiconductor fabrication process effects

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
Reexamination Certificate

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Gate modeling for semiconductor fabrication process effects

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-3217586

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