4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

Jay K. Gupta

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Configurable and memory architecture independent memory...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Method and apparatus for re-accessing a FIFO location

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Method of maximizing bandwidth efficiency in a protocol...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2685301

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