4. Error detection/correction and fault detection/recovery
  5. Data processing system error or fault handling
  6. Reliability and availability

James Leigh Taylor

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Cache memory system and method utilizing doubly-linked loop...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Information processing system hardware test

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Processor and method for generating a pointer

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Profile ID: LFUS-PAI-P-2101413

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