4. Electronic digital logic circuitry
  5. Interface
  6. Logic level shifting

Howard Chen

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Charge pump level converter (CPLC) for dual voltage system...

Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate

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Frame matching method

Multiplex communications – Communication techniques for information carried in plural... – Adaptive
Reexamination Certificate

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Utilization of MACRO power routing area for buffer insertion

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2806020

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