4. Static information storage and retrieval
  5. Associative memories
  6. Ferroelectric cell

Hari B. Dubey

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CMOS to PECL voltage level converter

Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate

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Content addressable memory cell architecture

Static information storage and retrieval – Associative memories – Ferroelectric cell
Reexamination Certificate

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Transceiver providing high speed transmission signal using...

Electronic digital logic circuitry – Reliability – Redundant
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2921054

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