4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Memory configuring

Galileo Technologies Ltd.

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Bit clearing mechanism for an empty list

Multiplex communications – Data flow congestion prevention or control
Reexamination Certificate

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First-in, first-out (FIFO) buffer

Static information storage and retrieval – Read/write circuit – Serial read/write
Patent

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Memory array comprised of multiple FIFO devices

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Patent

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Switching ethernet controller

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Patent

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Switching ethernet controller providing packet routing

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing
Patent

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