4. Static information storage and retrieval
  5. Read/write circuit
  6. Having particular data buffer or latch

Frank L. Laczko

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Reduced memory MPEG video decoder circuits and methods

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate

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Writable logic array

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Profile ID: LFUS-PAI-P-1881528

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