4. Multiplex communications
  5. Communication techniques for information carried in plural...
  6. Adaptive

Barry S. Burns

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Barrier synchronization mechanism for processors of a...

Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate

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Boundary synchronization mechanism for a processor of a...

Electrical computers and digital processing systems: processing – Processing architecture – Array processor
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Coherent access to and update of configuration information...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
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Descriptor transfer logic

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Method and apparatus for controlling packet header buffer...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
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Profile ID: LFUS-PAI-P-2754666

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