Mixed technology integrated circuit comprising CMOS structures a

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257378, 257544, 257548, 257550, 257557, H01L 2976

Patent

active

RE0354422

ABSTRACT:
A high density, mixed technology integrated circuit comprises CMOS structures and bipolar lateral transistors, the electrical efficiency and Early voltage of which are maintained high by forming "well" regions through the collector area. The operation determines the formation of a "collector extension region" extending relatively deep within the epitaxial layer so as to intercept the emitter current and gather it to the collector, subtracting it from dispersion toward the substrate through the adjacent isolation junctions surrounding the region of the lateral bipolar transistor. Under comparable conditions, the ratio between IcIsubstrate is incremented from about 8 to about 300 and the Early voltage from about 20V to about 100V. The V.sub.CEO, BV.sub.CBO and BV.sub.CES voltages are also advantageously increased by the presence of said "well" region formed in the collector zone.

REFERENCES:
patent: 4642667 (1987-02-01), Magee
patent: 4669177 (1987-06-01), D'Arrigo et al.
patent: 4812891 (1989-03-01), Bingham
patent: 4829357 (1989-05-01), Arndt
patent: 5070381 (1991-12-01), Scott et al.
patent: 5262345 (1993-11-01), Nasser et al.
Beasom, "A high performance high voltage lateral PNP structure," 1983 International Electron Devices Meeting 424ff (paper 16.5)-Jan.
Vittoz, "MOS transistors operated in the lateral bipolar mode and their application in CMOS technology,"-18 IEEE Journal of Solid-State Circuits 273ff (1983)-Jan.
Schade et al., "Complementary DMOS/BICMOS Technology for ower IC applications," 1988 International Electron Devices Meeting 796ff -Feb.
Sugawara et al., "A high performance, high voltage lateral pnp transistors," Extended Abstracts of the 16th (1984 International) Conference on Solid State Devices and Materials pp. 317ff (1984)-Feb.
Inohira et al., "Merged bipolar transistor models including the substrate current," 73 Electronics and Communications in Japan, Part 2 (Electronics) pp. 10ff (Mar. 1990)-Jan.
Malhi et al., "The Early voltage of a lateral PNP transistor," 21 Solid-State Electronics 1187ff (1978)-Mar.
Murari, "Power Integrated Circuits: Problems, Tradeoffs, and Solutions," 13 IEEE Journal of Solid-State Circuits 307ff (1978)-Jan.
Hatcher, "A practical high gain lateral pnp for integrated circuit use," 1967 International Electron Devices Meeting p. 12-Jan.
Blanchard et al., "High-Voltage Simultaneous Diffusion Silicon-Gate CMOS," 9 J. Solid-State Circuits 103ff (1974)-Jan.
Einziger et al., "Monolithic IC Power Switch for Automotive Applications," 1986 ISSCC 22ff-Jan.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Mixed technology integrated circuit comprising CMOS structures a does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Mixed technology integrated circuit comprising CMOS structures a, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mixed technology integrated circuit comprising CMOS structures a will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-670391

All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.