Method and circuit for sending a signal in a semiconductor devic

Details Method and circuit for sending a signal in a semiconductor devic Method and circuit for sending a signal in a semiconductor devic

1998-06-05

2000-04-25

Nelms, David

Static information storage and retrieval

Addressing

Sync/clocking

365191, 36523003, 365194, G11C 800

Patent

active

060552085

ABSTRACT:
A memory having a control circuit for initiating a read or a write operation in response to a combination of input signals during a setup time is described. The setup time is a specified time period during which all inputs must remain valid before a next appearance of a rising edge of a clock signal. The control circuit uses the setup time to send a signal from one part of the memory to another part of the memory to avoid the propagation delay time. Further, a circuit is provided which prepares the memory for a write operation prior to the setup time.

REFERENCES:
patent: 5581512 (1996-12-01), Kitamura
patent: 5623453 (1997-04-01), Shinozaki
patent: 5703828 (1997-12-01), Park et al.
patent: 5867447 (1999-02-01), Koshikawa

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