ESD protection circuit

Details ESD protection circuit ESD protection circuit

1993-05-03

1995-12-19

Pellinen, A. D.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 54, 361 91, 361111, H02H 904

Patent

active

054774144

ABSTRACT:
An ESD protection circuit combines a split bipolar transistor with a transistor layout which exhibits very high tolerance to ESD events. The split bipolar transistor divides current among many segments and prevents the current hogging which often causes an ESD failure. Several splitting structures are disclosed, each combining a resistor in series with each segment to distribute current evenly. The transistor takes advantage of the snap-back effect to increase current carrying capacity. Layout positions metal contacts away from regions of highest energy dissipation. Layout also allows high currents to be dissipated through ESD protection structures and not through circuit devices such as output drivers or through parasitic bipolar transistors not designed for high current. Sharp changes in electron density are avoided by the use of high-diffusing phosphorus in N-regions implanted to both lightly and heavily doped levels. Critical corners are rounded rather than sharp. Certain P-type channel stop implants are positioned away from nearby N-regions to increase breakdown voltage.

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David Sarnoff Research Center, Subsidiary of SRI International; "Electrostatic Discharge Protection"; pp. 1-4; 05/18-11-400-007; Princeton, New Jersey, 1991.

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