Patent
1976-10-26
1978-04-11
Adams, Russell E.
354 53, 354 60L, 354289, G03B 708, G03B 1720
Patent
active
040841669
ABSTRACT:
An SLR camera includes a light measuring and computing circuit 1-7 whose output is fed to a comparator 8 together with the analog output of a D/A converter 12 coupled to a bidirectional counter 13. The counter is servo-loop driven to achieve circuit balance through AND gates 10, 11 in response to the comparator outputs, and the decoded counter outputs energize an appropriate LED display element L1-L16. The AND gates are disabled by the closing of switch 17 in response to the raising of the reflex mirror, to thereby lock the counter and display and prevent fluctuations therein. A capacitive time delay may be provided after the reopening of the switch following the lowering of the mirror to allow circuit transients to settle out.
REFERENCES:
patent: 3879118 (1975-04-01), Kiyohara
patent: 3921183 (1975-11-01), Toyoda
patent: 3921187 (1975-11-01), Kobori et al.
Kawasaki Masahiro
Sawada Yoshio
Tano Eiichi
Adams Russell E.
Asahi Kogaku Kogyo Kabushiki Kaisha
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