DC centering analog receiver for flash A/D converter

Details DC centering analog receiver for flash A/D converter DC centering analog receiver for flash A/D converter

1993-06-22

1995-06-06

Williams, Howard L.

Coded data generation or conversion

Converter compensation

341155, H03M 106

Patent

active

054226422

ABSTRACT:
An analog receiver circuit suitable for use with a flash analog-to-digital converter is described. A first stage of the receiver acts essentially as a voltage follower, receiving the centertap voltage of a flash A/D converter resistor ladder, and maintaining an internal reference voltage substantially equal to the centertap voltage over time. A second stage of the analog receiver acts as centering means, receiving an analog signal and centering it with respect to the internal reference voltage provided by the first stage. The receiver is thus able to provide an analog signal to the flash A/D converter which is dynamically centered with respect to the converter's operating voltage, thereby reducing DC offset. Moreover, introducing the analog signal at the second stage minimizes the bandwidth-limiting elements between this input signal and the DC-centered output signal. Thus DC offset is further reduced and operating frequencies of 500 MTz or greater are possible.

REFERENCES:
patent: 4274050 (1981-06-01), Martin
patent: 4608555 (1986-08-01), Hoeft
patent: 4639715 (1987-01-01), Doluca
patent: 4894657 (1990-01-01), Hwang et al.
patent: 4918450 (1990-04-01), Sugiyama et al.
patent: 5194865 (1993-03-01), Mason et al.

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