Digital FIR filters with enhanced tap weight resolution

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G06F 1531

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active

046150269

ABSTRACT:
Output weighted FIR filters usually consist of a tapped delay line, weighting circuits coupled to the taps for weighting delayed samples and adder circuitry for combining the weighted samples. In designing such circuitry, tradeoffs are made between device complexity and the desired filter transfer function. FIR filters employing shift-and-add weighting circuits may have the resolution of their weighting circuits significantly enhanced with slight added circuit complexity by providing a parallel tapped delay line to which scaled input samples are applied. The scaled and non-scaled signal samples from the parallel tapped delay lines are both made available to the weighting circuits. The availability of both such samples for shifting and adding, nominally increases the number of possible weighting coefficients realizable from the weighting circuits more than two fold and thus, improves the design flexibility of the filter significantly.

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Moon et al. "A Digital Filter Structure Requiring Only m-Bit Delays, Shifters, Inverters, and m-Bit Adders Plus Simple Logic Circuitry" IEEE Trans. on Circuits and Systems, vol. CAS-27, No. 10, Oct. 1980, pp. 901-908.

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