Method of manufacturing a fully planarized MOSFET and resulting

Details Method of manufacturing a fully planarized MOSFET and resulting Method of manufacturing a fully planarized MOSFET and resulting

1992-04-27

1995-06-06

Dang, Thi

Fishing, trapping, and vermin destroying

437 40, 437 41, H01L 2100

Patent

active

054222893

ABSTRACT:
A method is disclosed for forming MOSFET devices on a semiconductor substrate including steps of depositing layers of polysilicon, dielectric, and polysilicon again. Each polysilicon layer is planarized after it is deposited. The dielectric layer is patterned and etched to delineate active regions and interconnect grooves. After the second polysilicon layer is planarized, the material in the active region is patterned and etched to form a gate and source and drain areas. The appropriate areas of the active region are doped as necessary to form the source and drain.

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