Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Patent
1989-05-30
1990-07-17
Wong, Peter S.
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
363 97, 323289, H02M 3338, H02M 328
Patent
active
049425080
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The present invention relates to an improvement of a switching regulator used as a power supply for industrial electronic devices and the like.
A switching regulator is widely used as a power supply for industrial electronic devices and the like for converting a DC voltage into high-frequency pulses, converting the high-frequency pulses into a DC voltage by rectifying and smoothing same, and feeding back an output voltage to control the pulse width of the high-frequency pulses.
FIG. 2 shows an example of this switching regulator, wherein Vi designates an input voltage to the switching regulator, and a snubber circuit for a transistor Q1 is composed of a resistor R1, a capacitor C1, and a diode D1. The transistor Q1 and a transistor Q2 form an oscillation circuit using windings W1 and W2 of a transformer T as feedback loops, and an output voltage is determined by a pulse width of the transistor Q1.
In FIG. 2, C2 designates a speed up capacitor for turning the transistor Q1 on and off, and D2 designates a diode for checking a reverse direction. A resistor R2 supplies a base current to the transistor Q1 at the start of oscillation thereof, and resistors R3 and R4 are coupled at one end in series with the speed up capacitor C2 and at the other end with the winding W2. A capacitor C3 is coupled with a base of the transistor Q2 and is charged and discharged to turn the transistor Q2 on and off, and simultaneously, to turn the transistor Q1 on and off, whereby the output voltage is controlled. The capacitor C3 is charged through three routes, i.e., through a resistor R5 and a diode D3, through a resistor R6, a zener diode ZD and a diode D4, and through the resistor R4, a diode D6 and a photo coupler PC1, and discharged through the resistor R6, the zener diode ZD, a diode D5, and a resistor R7.
In the FIG. 2, D.sub.O designates a diode at an output side, C.sub.O designates a smoothing capacitor at the output side, R.sub.O designates a dummy resistor, and a DC voltage V.sub.O is applied to an output terminal.
The photo coupler PC1 feeds back the output voltage through the diode D6 to control a charge current to the capacitor C3. A shunt regulator SR acts as an operational amplifier and contains a reference voltage source, and when a feedback loop is balanced by the operation of the shunt regulator SR, the output voltage V.sub.O is determined as follows.
When the output voltage V.sub.O is increased, a current to a resistor R8 and the photo coupler PC1 is increased, a collector current of the photo coupler PC1 is increased, a charge current to the capacitor C3 is increased, and a timing for turning on the transistor Q2 is accelerated. As a result, a time for which the transistor Q1 is kept on is shortened, and the output voltage is decreased. With this arrangement, the output voltage is maintained at a predetermined value. A resistor R9 by-passes a leak current from the shunt regulator SR when a current is not supplied to the photo coupler PC1, and a capacitor C4 and a resistor R10 form an AC gain stabilizing circuit.
The capacitor C3 for setting a keeping-on-time is charged by the output from the photo coupler PC1 to set a keeping-off-time of the transistor Q2, i.e., a time for which the transistor Q1 is kept on is controlled by the voltage charged in the capacitor C3. Since, however, a certain amount of the voltage in the capacitor C3 is always discharged when the transistor Q1 is kept off, a time for which the transistor Q1 is kept on unavoidably corresponds to the amount of voltage discharged.
Further, since the current from the speed-up capacitor C2 is not completely absorbed by the transistor Q2 while turned on, the excess current flows into the base of transistor Q1 and turns the transistor Q1 on. This is also a reason why the time for which the transistor Q1 is kept on can not be less than a predetermined time.
Therefore, even when an attempt is made to set the keeping on time to a value smaller than a minimum keeping on time, when a load is too small, this value cannot be obtaine
REFERENCES:
patent: 3889173 (1975-06-01), Klusmann et al.
patent: 4758937 (1988-07-01), Usui et al.
patent: 4763235 (1988-08-01), Morita
Patent Abstracts of Japan, vol. 6, No. 140 (E-121) [1018], Jul. 29, 1982; & JP-A-57 62 774 (Tokyo Shibaura Denki K.K), 15-04-82.
Fanuc Ltd
Wong Peter S.
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