Method of reducing wasted bus bandwidth due to slow responding s

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Details

395325, 3642304, 36424292, 364DIG1, 36493144, 3649424, 36493701, 3649402, 364DIG2, G06F 1336

Patent

active

052573567

ABSTRACT:
In a multiprocessor computer system, wasted bus bandwidth resulting from slow responding slaves is reduced by relinquishing the master that was busied by the slow responding slave, and then causing the slave to effectively arbitrate for bus control on the relinquished master's behalf when the slow responding slave is either available to service the master or has the requested data. In accordance with the disclosed embodiment, the slave effectively arbitrates for bus control on the relinquished master's behalf by placing a unique arbitration code associated with the relinquished master on the bus. The relinquished master detects the presence of its arbitration code and then again arbitrates for bus control so that it may communicate with the slow responding slave.

REFERENCES:
patent: 4602327 (1986-07-01), LaViolette et al.
patent: 4706190 (1987-11-01), Bomba et al.
patent: 4785394 (1988-11-01), Fischer
patent: 4817037 (1989-03-01), Hoffman et al.
patent: 5101479 (1992-03-01), Baker et al.

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