PLL circuit with band width varying in accordance with the frequ

Details PLL circuit with band width varying in accordance with the frequ PLL circuit with band width varying in accordance with the frequ

1989-04-04

1990-07-17

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 11, 331 14, 331 17, 331 27, H03L 7087, H03L 7093

Patent

active

049423703

ABSTRACT:
A PLL circuit comprises a phase comparator for inputting input and output clock signals and detecting a difference in phase between these both signals and outputting a signal based on the phase difference; a proportional circuit for converting the output signal based on the phase difference from the phase comparator to a first voltage approximately proportional to the phase difference; an integral circuit for converting the output signal based on the phase difference from one of the phase comparator and the proportional circuit to a second voltage approximately proportional to an integral value of the phase difference; and a voltage-controlled oscillator for inputting the first output voltage from the proportional circuit and the second output voltage from the integral circuit, and generating an output clock signal having a frequency controlled by the first and second output voltages. The proportional and integral circuits may be replaced in function by a signal processing circuit for performing predetermined data processing operations according to first and second operating states with respect to the data read operation, and an operational circuit having at least integral characteristics.

REFERENCES:
patent: 3805183 (1974-04-01), Lance
patent: 4069462 (1978-01-01), Dunn
patent: 4404530 (1983-09-01), Stryer
patent: 4787097 (1988-11-01), Rizzo

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