FIFO Register with independent clocking means

Details FIFO Register with independent clocking means FIFO Register with independent clocking means

1981-06-01

1983-12-27

Smith, Jerry

Boots, shoes, and leggings

G06F 506

Patent

active

044234821

ABSTRACT:
There is described a register circuit which is utilized with a system having the capability of interfacing between two data processing units which may have different operating speeds or data rate handling capabilities. The register permits writing and reading of data in a manner which is independent of the operating speed of the processing unit. The register provides pointers which selectively permit reading and/or writing in a prescribed manner but, at the same time, prevents writing or reading in a forbidden condition (i.e., writing in a full register or reading from an empty register).

REFERENCES:
patent: 3940743 (1976-02-01), Fitzgerald
patent: 4143418 (1979-03-01), Hodge et al.
patent: 4204251 (1980-05-01), Brudevold
patent: 4214305 (1980-07-01), Tokita et al.
patent: 4225919 (1980-09-01), Kyv et al.
patent: 4263650 (1981-04-01), Bennett et al.
patent: 4271518 (1981-06-01), Birzele et al.
patent: 4318174 (1982-03-01), Suzuki et al.

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