Communications: electrical – Digital comparator systems
Patent
1975-07-28
1976-10-12
Fears, Terrell W.
Communications: electrical
Digital comparator systems
307238, G11C 1140
Patent
active
039861783
ABSTRACT:
An integrated injection logic memory cell includes a latch circuit for holding a binary bit of information. Circuits are provided to maintain current injection into the latch circuit at all times, including during the reading and writing operations. The latch circuit is made up of a pair of cross coupled vertical, inverted transistors. The circuits for maintaining the injection current into the latch are made up of lateral transistors selectivity coupled to a memory access control circuit for supplying bi-level signals through word and column select lines.
REFERENCES:
patent: 3218613 (1965-11-01), Gribble
McElroy David J.
Snuggs Wiley P.
Fears Terrell W.
Graham John G.
Levine Harold
Texas Instruments
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