Semiconductor device of complementary integrated circuit

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357 68, H01L 2702, H01L 2348

Patent

active

050141058

ABSTRACT:
A complementary IC device comprises: an n-semiconductor substrate; a p-well formed within the n-substrate: a n-channel FET (field effect transistor) formed on the p-well, the n-channel FET including an n-source connected to a first grounded line and an n-drain connected to an output line; a p-channel FET formed on the n-substrate, the p-channel FET including a p-source connected to a first voltage source line and a p-drain connected to the output line; a contact p-region formed on the p-well for providing electrical connection between the p-well and a second grounded line; and a contact n-region formed on the n-substrate for providing electrical connection between the n-substrate and a second voltage source line.

REFERENCES:
patent: 4053916 (1977-10-01), Cricchi et al.
patent: 4672584 (1987-06-01), Tsuji et al.
patent: 4689653 (1987-08-01), Miyazaki
patent: 4772930 (1988-09-01), Anami et al.
Weste, Neil H. et al, "Principles of CMOS VLSI Design: A Systems Perspective", Addison-Wesley VLSI Systems Series, 1985, p. 89.

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