Semiconductor integrated circuit having CMOS inverters

Details Semiconductor integrated circuit having CMOS inverters Semiconductor integrated circuit having CMOS inverters

1990-10-22

1991-05-07

Wojciechowicz, Edward J.

357 55, 357 59, 357 67, 357 71, H01L 2702

Patent

active

050141040

ABSTRACT:
A CMOS inverter which comprises a series of connected p-channel and n-channel MOS FETs of which gate electrodes, drain contact electrodes, and voltage source lines are arranged on different insulation layers stacked on each other. The drain contact electrodes are formed by a conductor, including a silicide of high melting point metal, such as, tungsten or molybdenum. They are coated by an insulation layer over which the voltage source lines and signal lines for transferring output to a succeeding stage are arranged. By doing so, the device area is decreased, and the substrate can be reflowed to smooth the surface of the insulator so as to prevent disconnecting of the wirings.

REFERENCES:
patent: 4710897 (1987-12-01), Masuoka et al.
patent: 4814841 (1989-03-01), Masuoka et al.

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