Tightly synchronized fault tolerant clock

Excavating

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371 61, 307464, G06F 1118

Patent

active

049842412

ABSTRACT:
A tightly synchronized fault tolerant clock has n+1 substantially identical modules for synchronizing the clock signals of the modules and masking out faults in up to n modules. Each module has an oscillator comprising an amplifier and a regenerative feedback path. The feedback path includes a resonator for determining the oscillation frequency, a variable trimming capacitor for establishing synchronization among the oscillators in the individual modules, an isolation buffer network to eliminate single point failure and to establish a fault containment region, and a majority voter network for maintaining tight synchronization among the oscillators and masking out faults in the individual modules.

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patent: 3599111 (1971-08-01), Butler, Jr.
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patent: 4239982 (1980-12-01), Smith
patent: 4683570 (1987-07-01), Bedard
patent: 4788670 (1988-11-01), Hofmann
patent: 4839855 (1989-06-01), Van Driel

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