1988-05-31
1991-01-08
Larkins, William D.
357 234, 357 55, H01L 27108
Patent
active
049840304
ABSTRACT:
A semiconductor memory wherein a part of each capacitor is formed on side walls of an island region surrounded with a recess formed in a semiconductor substrate, and the island region and other regions are electrically isolated by the recess.
REFERENCES:
patent: 4003036 (1977-01-01), Jeanne
patent: 4225879 (1980-09-01), Vinson
patent: 4271418 (1981-06-01), Hiltpold
patent: 4434433 (1984-02-01), Nishizawa
Kawamoto Yoshifumi
Kure Tokuo
Miyao Masanobu
Sunami Hideo
Tamura Masao
Hitachi , Ltd.
Larkins William D.
LandOfFree
Vertical MOSFET DRAM does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical MOSFET DRAM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical MOSFET DRAM will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-938451