Efficient means for implementing many-to-one multiplexing logic

Details Efficient means for implementing many-to-one multiplexing logic Efficient means for implementing many-to-one multiplexing logic

1981-07-14

1983-06-28

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370112, 307243, 328104, H04J 302, H03K 1700

Patent

active

043909884

ABSTRACT:
A circuit for multiplexing a plurality of input signals to a single output signal through the use of N and P channel FETs whereby complementary switching circuitry results in a minimization of power usage in either the active or static circuit conditions. This is accomplished by using a feedback technique and area sizing of the FETs to obtain optimum operational results in addition to the minimal power requirements.

REFERENCES:
patent: 3654394 (1972-04-01), Gordon
patent: 3702943 (1972-11-01), Heuner et al.
patent: 3902078 (1975-08-01), Peterson

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