Synchronizer for communications processor

Details Synchronizer for communications processor Synchronizer for communications processor

1986-07-03

1988-01-12

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

H04J 400

Patent

active

047196190

ABSTRACT:
A signal processor (11), such as a spectrum analyzer or SAW demodulator, defines a signal stream from a frequency division multiplexed (FDM) input (13) to a time division multiplexed (TDM) output (41). The signal stream includes a bivariate processor (23) for applying a function to the through-going signal.
The function is produced by a function generator (37) in response to a trigger (33) located remotely from the signal stream. To ensure timely convergence of signal and function, a phase-locked loop based on on/off modulated marker tones f.sub.H and f.sub.L is provided. The phase-locked loop includes an amplitude detector (27) for detecting the amplitudes of marker pulses which are transformed marker tone segments. The amplitudes are compared by a comparator (29) to form a discriminate which regulates a timing generator (31) which, thus, synchronizes the frequency sweep trigger.

REFERENCES:
patent: 4304000 (1981-12-01), Bonnerot et al.
patent: 4590595 (1986-05-01), Morimura

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