MOS charge pump generation and regulation method and apparatus

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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327541, 327546, 323315, 323317, G05F 110

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active

058085068

ABSTRACT:
MOS charge pump generation and regulation method and apparatus of the general type used in a non-volatile memory chip for generating high voltages (.about.20 v). This invention utilizes a current controlled oscillator to generate the clock for the charge pump voltage multiplier. The oscillator frequency is designed to compensate for process, temperature and power supply variations. The charge pump shunt regulator only utilizes regular low voltage NMOS and PMOS from a standard CMOS process. A reference voltage scheme is used in which a regular low voltage PMOS is used as a mirror diode (reference PMOS) to precisely realize a control voltage for the shunting NMOS without violating any breakdown mechanism, i.e. PMOS gated diode breakdown and P+ to n-well junction breakdown. A medium voltage level is also used to buffer the shunting NMOS transistors from gated diode breakdown. A native NMOS cascode current mirror is used to precisely mirror the current to achieve minimum headroom voltage with minimum circuit area.

REFERENCES:
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patent: 5220531 (1993-06-01), Blyth et al.
patent: 5241494 (1993-08-01), Blyth et al.
patent: 5243239 (1993-09-01), Khan et al.
patent: 5294819 (1994-03-01), Simko
patent: 5352934 (1994-10-01), Khan
patent: 5388064 (1995-02-01), Khan
"Physics and Technology of Semiconductor Devices", A.S. Grove, pp. 311-314, John Wiley and Sons, Inc. (1967).
"On-Chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved Voltage Multiplier Technique", J.F. Dickson, IEEE Journal of Solid-State Circuits, vol. SC-11, No. 3, Jun. 1976.

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