Patent
1992-12-28
1996-03-26
Auve, Glenn A.
395856, G06F 13364
Patent
active
055028241
ABSTRACT:
A Peripheral Component Interconnect (PCI) bus has a protocol that guarantees that at all times, except for turn-around clocks necessary to prevent contention, that the bus is actively driven to a logic 1 or 0 by some device attached thereto. As long as all devices attached to the bus are compliant with the specification, the bus will never be left floating for long intervals, and thus the system designer is free to eliminate the pull-up resistors typically required on other buses.
REFERENCES:
patent: 4766334 (1988-08-01), Warner
patent: 5109493 (1992-04-01), Banerjee
patent: 5291080 (1994-03-01), Amagasaki
patent: 5305443 (1994-04-01), Franzo
patent: 5392407 (1995-02-01), Heil et al.
Auve Glenn A.
Gates George H.
NCR Corporation
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