Method of fabricating high voltage complementary metal oxide sem

Fishing – trapping – and vermin destroying

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

437 34, 437 56, 437 57, 148DIG126, H01L 2170

Patent

active

053765680

ABSTRACT:
A method for manufacturing CMOS transistors for integrated circuits which have metal gates and heavily doped source and drain electrode regions, thereby improving their resisting capability to a high voltage while reducing cycle time for manufacture. As a result, the performance of the transistors is improved and the cost of manufacture is reduced.

REFERENCES:
patent: 4285116 (1981-08-01), Meguro
patent: 4780428 (1988-10-01), Nakakura et al.
patent: 4795716 (1989-01-01), Yilmaz et al.
patent: 4978628 (1990-12-01), Rosenthal
patent: 5047358 (1991-09-01), Kosiak et al.
patent: 5169796 (1992-12-01), Murray et al.
patent: 5242841 (1993-09-01), Smayling et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of fabricating high voltage complementary metal oxide sem does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating high voltage complementary metal oxide sem, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating high voltage complementary metal oxide sem will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-918974

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.